Senoor Manager / Manager - DEG Layout ( Techninal)
Location: Hyderabad
This position is a permanent position with our client (US Based Semiconductor Product Company with revenue more than 30 Billion USD)
Our client is a world leader (Top5 Semicon Company in 2018) in innovative memory solutions that transform how the world uses information. They have over 34,000 team members in 17 countries who work with the worlds most trusted brands, delivering memory and storage systems for a broad range of applications and sparking countless possibilities in technology
Senior Manager / Manager - DEG Layout
Description
For more than 40 years, we have redefined innovation with the worlds most advanced memory and semiconductor technologies. Were an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are searching for an IC Layout Manager in DRAM Engineering Group in India.
As an IC Layout Manager, you will work with an exceptionally talented, passionate core team based in India, lead the team to design IC layout, collaborating with peer teams crossing our global footprint, to meet scheduled milestones in a multiple projects-based environment.
Responsibilities
Provide leadership in building and growing a Custom layout team from the ground up to support our global DRAM layout requirement;
Provide leadership in developing Analog and custom layout to meet schedule and milestone;
Provide leadership in training the teams technical skills and cultural healthiness.
Effectively communicating with engineering teams in the US, Japan and China to assure the success of the layout project.
Organize, prioritize, and manage logistic on tasks and resource allocations for multiple projects.
Manage performance and development of team members.
Managing hiring and retention.
As a critical member of the core DRAM leadership team in India, contribute to the overall success of our DRAM India operation
Qualification/Requirements
Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
Must have strong skills in layout and floor planning skills and manual routing.
Strong ability to build, and continuously develop a premier analog/mixed-signal layout team
Experienced in managing multiple Custom IC layout projects
Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design.
The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment.
Excellent verbal and written communication skills required.
Independent with strong analytical skills, creative thinking and self-motivated.
Capable of working in a cross functional, multi-site team environment in multiple time zones.
Previous work experience in DRAM/NAND layout design is desirable however not mandatory.
Education
Contact: Uday Bhaskar
Mulya Technologies
"Mining the Knowledge Community"
Email id : mu**********r@ya**o.com
Keyskills: Layout finfet LVS calibre dfm vxl Nand cadence mentor graphics vle layout manager CMOS layout design DRC dram Virtuoso tapeout
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