Your browser does not support javascript! Please enable it, otherwise web will not work for you.

Sr. Memory Layout Design Engineer @ VMware

Home > Hardware

 Sr. Memory Layout Design Engineer

Job Description

Please Note:
1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
Requirements:
  • Strong layout knowledge with a minimum of 6 to 10 years of experience
  • Applicants must hold a Bachelors degree
  • Skills include Cadence layout, Cadence schematic capture, using CALIBRE Hercules verification tools.
  • Strong layout knowledge in submicron process, e.g. 16nm, 7nm, 5nm, 3nm etc
  • Experienced in digital (standard cell, memory, I/O) layout
  • Experienced in analog layout is also a plus
Job Description:
  • Responsible to understand and apply all necessary layout guidelines (standard cells, I/O memories), new process rules and other technical requirements for quality layout
  • Schedule time-line layout floor-planning
  • Complete quality layout and verification within planned schedule (without supervision for experienced engineer)
  • Get up to speed quickly for new methodologies, open to new ideas and communicate well with others in the library team
Skill Set (Mem):
  • Strong experience in memory layout design and physical verifications includes LVS, DRC, ERC, Antenna, ElectroMigration in CMOS process.
  • Experienced in Cadence Layout tools VIRTUOSO (XL,VXL or EXL), and CALIBRE verification tools.
  • Good experience in Floor-planning, hierarchy layout and chip integration.
  • Knowledge of Script Programming and SKILL Programming would be a plus.
  • Able to lead or train a team of junior engineers
  • Good knowledge on memory layout topology.
  • Experience in the memory compiler will be a plus.
  • Ability to lead on new technology reviews to compile documentation of layout methodology, layout flow and guidelines.
  • Self-reliant, with ability to work independently as well as a team.
  • Good leadership quality on project management.
.

Job Classification

Industry: Software Product
Functional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Physical Design / Layout Engineer
Employement Type: Full time

Contact Details:

Company: VMware
Location(s): Bengaluru

+ View Contactajax loader


Keyskills:   Training Layout design Usage Project management Manager Technology Programming Floor planning Virtuoso Analog layout Supervision

 Fraud Alert to job seekers!

₹ Not Disclosed

Similar positions

Analog Layout Engineer

  • Capgemini
  • 6 - 8 years
  • Bengaluru
  • 4 days ago
₹ Not Disclosed

Data Analytics Engineer

  • Automotive Industry
  • 5 - 6 years
  • Chennai
  • 5 days ago
₹ Not Disclosed

Electrical Design Engineer - Mnc Company (5 Days) Dlf Phase -2,gurgaon

  • Capital Placement
  • 2 - 6 years
  • Delhi, NCR
  • 5 days ago
₹ 4-5 Lacs P.A.

Sr Staff GPU Physical Design Engineer

  • Qualcomm
  • 4 - 9 years
  • Noida, Gurugram
  • 5 days ago
₹ Not Disclosed

VMware

VMware (NYSE: VMW), the global leader in cloud infrastructure, delivers customer-proven virtualization solutions that significantly reduce IT complexity. VMware accelerates an organization’s transition to cloud computing, while preserving existing IT investments and enabling more efficient, a...