Candidate needs to be MTech in EE Communications from premium college. He should be hands - on in Virtuoso schematic/simulations and preferably layout.
He should have worked in Matlab. Project Experience in EM - Solvers, High - Speed and HDL coding would be added plus.
He is expected to have deep knowledge in Analog concepts and good understanding of Communication and RF modulation schemes.
He should have ability to program in C/C++
Keyskills: Engineer II HDL C++ RF Coding Analog Manager Technology MATLAB Virtuoso
Cadence is a leading provider of EDA and semiconductor IP. Our custom/analog tools help engineers design the transistors, standard cells, and IP blocks that make up SoCs. Our digital tools automate the design and verification of giga-scale, giga-hertz SoCs at the latest semico...