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RTL Engineer @ TekWissen

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 RTL Engineer

Job Description

Overview: 

TekWissen is a global workforce management provider throughout India and many other countries in the world. 


Position: RTL Engineer

Location: Hyderabad

Work Type: Onsite
Job Type: Full time


Job Description:

Key Responsibilities:

  • Understand RTL at structural level, IP boundaries, IP parameters.
  • Understand IP design.
  • Add assertions where needed.
  • Generate various constraints necessary for the IP.
  • RTL build flow setup and maintenance.
  • Do the quality checks of the IP like Lint/CDC/RDC/Synth/Timing checks/waiver creation across milestones.
  • Participate in IP integration to the subsystem level.
  • Write sample test bench to verify the basic functionality of the IP/block.
  • Do the first level of triage of the functional issues reported.
  • Understand the reports out of quality checks such as Lint/CDC/RDC/Synth/Timing checks and suggest fix in the RTL
  • Work with functional verification team to meet coverage and quality standards.
  • Guarantee quality/timely deliverables meeting projects schedule.
  • Help to improve/automate design process.

PREFERRED EXPERIENCE:

  • Knowledge of ASIC development flows
  • Knowledge of front-end RTL design tools and methodologies.
  • Knowledge of system Verilog
  • Multi-clock domain designs.
  • Design constraints for synthesis and static timing analysis.
  • Experience in RTL linting tools, reset domain crossings, clock domain crossings, synthesis, RAM generation (area, timing, power)
  • Knowledge of AXI/AMBA protocol
  • Ability to create a simple SV based Test benches, create sanity test plan, run the test cases
  • Knowledge of front-end requirements and deliverables for verification, validation, physical design, architecture, security, dfx, power.
  • Verification - coverage, test plan, debug
  • Physical design timing, clock crossings, reset crossings, ECOs (manual, formal)
  • Ability to work and effectively collaborate with partners
  • Knowledge of scripting languages like Perl, tcl or cshell
  • Experience with DMAs, PCIe, ordering, data path virtualization, performance, flow control a plus.

TekWissen Group is an equal opportunity employer supporting workforce diversity.

Job Classification

Industry: Electronic Components / Semiconductors
Functional Area / Department: Research & Development
Role Category: Engineering & Manufacturing
Role: Design Engineer
Employement Type: Full time

Contact Details:

Company: TekWissen
Location(s): Hyderabad

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Keyskills:   ASIC IP boundaries Verification RTL at structural level RTL Coding RTL Design IP parameters.

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