FPGA Verification Team lead
- Same Page Hiring
- 10 to 15 Yrs
- All India
- 3 days ago
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Job Description
- We are seeking an experienced and motivated FPGA Verification Team Lead to join our hardware engineering team. In this role, you will plan and build a UVM SV environment and lead a team of verification engineers responsible for ensuring the functional verification of a full FPGA design. Duties and Responsibilities: Lead and mentor FPGA verification engineers Plan and implement verification plans, strategies, and methodologies Work closely with FPGA designers and system architects Develop and maintain verification environments and agents using System Verilog UVM methodologies Monitor and report verification progress, coverage metrics, and quality indicators. Support regression testing, bug tracking, and issue resolution during the development cycle. Track verification progress using Agile tools (e.g., Jira, Azure DevOps) and provide regular status updates and metrics. Technical Requirements: Bachelors degree in electrical engineering, Computer Engineering or Computer Science 10+ years of experience in FPGA or ASIC verification, with at least 2 years in a leadership or team lead role Strong hands-on experience in writing System-verilog UVM agents and full UVM environments from scratch Strong hands-on experience in writing verification plans and coverage plans Solid understanding of FPGA architecture and RTL design Familiarity with version control systems (e.g., Git) and issue tracking tools (e.g., Jira). Excellent leadership, communication, and organizational skills Strong experience with simulation tools such as Xcelium, Questasim or VCS Strong debug capabilities Strong hands-on experience in writing System-Verilog UVM agents and full UVM environments from scratch Strong hands-on experience in writing verification plans and coverage plans Preferred technical Requirements: Graduated with honors or equivalent distinctions Academic honors, scholarships, or recognition demonstrating intellectual capability Knowledge of automation frameworks and CI/CD tools: Azure DevOps, Atlassian, GIT Experience in programming and scripting languages: Bash, Python Experience in using MATLAB models and generators as part of the verification flow Experience in DevOps tools like Azure DevOps Good knowledge of signal processing No of years of experience: 10 - 15 years Managerial experience: 3 - 4 years Technical Lead experience: 4 - 5 years,
Employement Category:
Employement Type: Full timeIndustry: Engineering / ConstructionRole Category: Not SpecifiedFunctional Area: Not SpecifiedRole/Responsibilies: FPGA Verification Team leadContact Details:
Company: Expert ExecutiveLocation(s): All India+ View Contact
Keyskills: FPGA ASIC verification System Verilog UVM RTL design Git Questasim VCS Bash Python MATLAB
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